This invention relates to semiconductor devices, and more particularly to electrostatic discharge protection circuits for input and output terminals of such devices.
All MOS devices employ protection circuits at the input and output pads to prevent damage to the internal circuitry caused by electrostatic discharge. Usually the voltage level which these protection circuits will withstand is about 3000 volts. An MOS device can be damaged by routine handling, even with this degree of protection.
It is the principal object of this invention to provide improved electrostatic discharge protection for MOS integrated circuits. Another object is to provide input and output protection circuits for MOS device that can withstand much more than 3000 volts ESD, preferably up to 8000 to 10000 volts.